Texas Instruments SN74AC2G101/SN74AC2G101-Q1 Gates
Texas Instruments SN74AC2G101/SN74AC2G101-Q1 Gates feature two independent D-type flip-flops with rising-edge triggered configurable logic clock, active-low clear, and data inputs. The clock inputs can be arranged for multiple 1- and 2-input logic functions, including buffer, inverter, AND, OR, NAND, NOR, XOR, and XNOR. All inputs have a Schmitt-trigger architecture to support slow or noisy input signals.
The TI SN74AC2G101-Q1 is AEC-Q100 qualified for automotive applications.
Features
- AEC-Q100 qualified for automotive applications (SN74AC2G101-Q1):
- Device temperature grade 1 of -40°C to +125°C
- Device HBM ESD classification level 2
- Device CDM ESD classification level C4B
- Available in a wettable flank QFN package
- Wide operating range of 1.5V to 6V
- Inputs accept voltages up to 6V
- Continuous ±24mA output drive at 5V
- Supports up to ±75mA output drive at 5V in short bursts
- Drives 50Ω transmission lines
- Maximum tpd of 11.3ns at 5V, 50pF load
Applications
- Hold a signal during controller reset
- Input slow edge-rate signals
- Operate in noisy environments
Datasheets
Logic Diagram (Positive Logic)
Dev Tools
Texas Instruments 14-24-LOGIC-EVM Logic Evaluation Module (EVM)
Generic evaluation module developed to support any TI logic leaded device in a 14 to 24 pin count.
Texas Instruments 14-24-NL-LOGIC-EVM Logic Evaluation Module (EVM)
Supports any logic or translation device in a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.