Texas Instruments CDCE62005 5/10 Clock Generator & Jitter Cleaner

Texas Instruments CDCE62005 5/10 Output Clock Generator and Jitter Cleaner is a high-performance clock generator and distributor featuring low output jitter, a high degree of configurability via an SPI interface, and programmable start-up modes determined by on-chip EEPROMs. Specifically tailored for clocking data converters and high-speed digital signals, the CDCE62005 achieves jitter performance well under 1ps RMS (10kHz to 20MHz integration bandwidth). The CDCE62005 incorporates a synthesizer block with a partially integrated loop filter, a clock distribution block including programmable output formats, and an input block featuring an innovative smart multiplexer. The clock distribution block includes five individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS).

Features

  • Superior performance
    • 550fs rms typical low noise clock generator (10kHz to 20MHz integration bandwidth), FC = 100MHz
    • 2.6ps rms typical low noise jitter cleaner (10kHz to 20MHz integration bandwidth), FC = 100MHz
  • Flexible frequency planning
    • 5x fully configurable outputs: LVPECL, LVDS, LVCMOS, and special high swing output modes
    • Unique dual-VCO architecture supports a wide 1.750GHz to 2.356GHz tuning range
    • Output frequency ranges
      • 4.25MHz to 1.175GHz in synthesizer mode
      • Up to 1.5GHz in fan-out mode
    • Independent coarse skew control on all outputs
  • High flexibility
    • Integrated EEPROM determines device configuration at power-up
    • Smart input multiplexer automatically switches between one of three reference inputs
  • 7mm × 7mm, 48-pin VQFN package (RGZ)
  • -40°C to +85°C temperature range

Applications

  • Wireless infrastructure
  • Switches and routers
  • Medical electronics
  • Military and aerospace
  • Industrial

Specifications

  • -0.5V to 4.6V supply voltage range
  • ±20mA input current
  • ESD ratings
    • 2000V maximum human body model
    • 750V maximum charged device model
  • ±50mA output current for LVPECL/LVCMOS outputs
  • 3pF input capacitance
  • 50Ω ESR
  • 10-year data retention

Functional Block Diagram

Block Diagram - Texas Instruments CDCE62005 5/10 Clock Generator & Jitter Cleaner
Published: 2016-01-19 | Updated: 2022-03-11