STMicroelectronics SPC58ECx 32-bit Microcontrollers

STMicroelectronics SPC58ECx 32-bit Microcontrollers are AEC-Q100 qualified microcontrollers designed to replace the SPC564Cx and SPC56ECx families. These MCUs feature e200z420 and e200z0 processor cores, embedded in the hardware security module. The SPC58ECx microcontrollers offer 4224KB (4096KB code flash + 128KB data flash) on-chip flash memory supporting read during a program and erase operations. Additionally, these MCUS also offer 176KB HSM dedicated flash memory (144KB code + 32KB data) and 384KB on-chip general-purpose SRAM. The SPC58ECx MCUs STMicroelectronics SPC58ECx 32-bit Microcontrollers provide higher throughput, low power capabilities, and significant power/performance improvement. STMicroelectronics SPC58ECx 32-bit Microcontrollers are ideally suited for automotive ASIL-B applications.

Features

AEC-Q100 qualified
High-performance e200z420n3 dual core:
- 32-bit Power Architecture technology CPU
- Core frequency as high as 180MHz
- Variable Length Encoding (VLE)
4224KB (4096KB code flash + 128KB data flash) on-chip flash memory:
- Supports read during a program and erases operations and multiple blocks allowing EEPROM emulation
176KB HSM dedicated flash memory (144KB code + 32KB data)
384KB on-chip general-purpose SRAM (in addition to 128KB core local data RAM: 64KB included in each CPU)
Multi-channel Direct Memory Access controller (eDMA) with 64 channels
1 Interrupt Controller (INTC)
Comprehensive new generation ASIL-B safety concept:
- ASIL-B of ISO 26262
- FCCU for collection and reaction to failure notifications
- Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
- Cyclic Redundancy Check (CRC) unit
Crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus masters with end-to-end ECC
Body Cross Triggering unit (BCTU):
- Triggers ADC conversions from any eMIOS channel
- Triggers ADC conversions from up to 2 dedicated PIT_RTIs

Enhanced Modular IO Subsystem (eMIOS):
- up to 64 timed I/O channels with a 16-bit counter resolution
Enhanced analog-to-digital converter system with:
- 3 independent fast 12-bit SAR analog converters
- 1 supervisor 12-bit SAR analog converter
- 1 10-bit SAR analog converter with STDBY mode support:
Communication interfaces:
- 18 LINFlexD modules
- 8 Deserial Serial Peripheral Interface (DSPI) modules
- 8 MCAN interfaces with advanced shared memory scheme and ISO CAN-FD support
- Dual channel FlexRay controller
- 1 Ethernet controller 10/100Mbps compliant with IEEE 802.3-2008
Low power capabilities:
- Versatile low power modes
- Ultra-low power standby with RTC
- Smart wake-up Unit for contact monitoring
- Fast wake-up schemes
Dual phase-locked loops with stable clock domain for peripherals and FM modulation domain for computational shell
Nexus Development Interface (NDI) per IEEE-ISTO 5001-2003 standard, with some support for 2010 standard
Boot Assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART
-40°C to +150°C junction temperature range