GSI Technology SigmaQuad-IIIe ECCRAMs
GSI Technology SigmaQuad-IIIe ECCRAMs are the Separate I/O half of the SigmaQuad-IIIe/SigmaDDR-IIIe family of high performance ECCRAMs. Although very similar to GSI's second generation of networking SRAMs (the SigmaQuad-II/SigmaDDR-II family), these third generation devices offer several new features that help enable significantly higher performance.
Features
- 4Mb x 36 and 8Mb x 18 organizations available
- 833 or 800MHz maximum operating frequency
- 1.6BT/s peak transaction rate (in billions per second)
- 115Gb/s or 120Gb/s peak data bandwidth (in x36 devices)
- Separate I/O DDR Data Buses
- Non-multiplexed DDR Address Bus
- One or two operations - Read and Write - per clock cycle
- Burst of two or four Read and Write operations
- 3-cycle Read Latency
- On-chip ECC with virtually zero SER
- 1.25V ~ 1.3V core voltage
- 1.2V ~ 1.3V HSTL I/O interface
- Configurable ODT (on-die termination)
- ZQ pin for programmable driver impedance
- ZT pin for programmable ODT impedance
- IEEE 1149.1 JTAG-compliant Boundary Scan
- 260-pin, 14x22mm, 1mm ball pitch, 6/6 RoHS- compliant BGA package
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Published: 2019-06-26
| Updated: 2023-04-21