FPC402RHUT

Texas Instruments
595-FPC402RHUT
FPC402RHUT

Mfr.:

Description:
Interface - Specialised Quad Port Controller 56-WQFN -40 to 85 A A 595-FPC402RHUR

ECAD Model:
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In Stock: 500

Stock:
500 Can Dispatch Immediately
Factory Lead Time:
18 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
£-.--
Ext. Price:
£-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 250)

Pricing (GBP)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
£7.45 £7.45
£5.81 £58.10
£5.40 £135.00
£4.95 £495.00
Full Reel (Order in multiples of 250)
£4.73 £1,182.50
£4.53 £2,265.00
£4.47 £4,470.00
2,500 Quote
† A MouseReel™ fee of £3.50 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable.

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Interface - Specialised
RoHS:  
Quad Port Controller
Aggregators
3.3 V
1.8 V
- 40 C
+ 85 C
SMD/SMT
WQFN-56
Brand: Texas Instruments
Interface Type: I2C/SPI
Moisture Sensitive: Yes
Operating Supply Voltage: 1.8 V to 3.3 V
Packaging: Reel
Packaging: Cut Tape
Packaging: MouseReel
Product: Controllers
Product Type: Interface - Specialized
Series: FPC402
Factory Pack Quantity: 250
Subcategory: Interface ICs
Unit Weight: 121.800 mg
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Attributes selected: 0

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CNHTS:
8542319090
CAHTS:
8542390000
USHTS:
8542390090
TARIC:
8542399000
MXHTS:
8542399901
ECCN:
EAR99

FPC402 Quad Port Controller

Texas Instruments FPC402 Quad Port Controller serves as a low-speed signal aggregator for common port types such as SFP, QSFP, Mini-SAS HD, and others. The FPC402 aggregates all low-speed control and I2C signals across four ports and presents a single easy-to-use management interface to the host (I2C or SPI). Multiple FPC402s can be used in high-port-count applications with one common control interface to the host. To simplify routing, the Texas Instruments FPC402 is designed to allow placement on the bottom side of the PCB, underneath the press-fit connector. This localized control of the low-speed signals in the ports cuts system BOM costs by enabling smaller IO count control devices (FPGAs, CPLDs, and MCUs) and reducing routing layer congestion.